In a half adder, what are the Boolean expressions for SUM and CARRY in terms of inputs A and B?

SUM = A XOR B, and CARRY = A AND B. The half adder is the simplest binary adding circuit and is a classic example of combining basic gates into a useful building block.

Forces / Logic gate lab

Digital electronics

Logic gate lab

Q: State De Morgan's first theorem and its logic-gate equivalent.

De Morgan's first theorem: (A · B)' = A' + B' — the complement of an AND is the OR of the complements. In gates, this means a NAND gate (AND then NOT) is logically identical to an OR gate fed by two inverted inputs: NAND(A,B) = OR(NOT A, NOT B).

Q: What is another name for a NOT gate, and how can it be built from a NAND gate?

A NOT gate is also called an inverter. It can be built from a NAND gate by tying both of the NAND gate's inputs to the same signal: NAND(A,A) = NOT(A AND A) = NOT(A).

Wire up to 10 logic gates together — AND, OR, NOT, NAND, NOR, XOR and XNOR, every gate there is — drag each gate to exactly where you want it in the diagram, toggle the inputs, then press Check answer for a slow, fully-explained walk-through of exactly how the signal flows from input to output, one gate at a time. Every result is exact Boolean algebra: no approximation, no assumption.

Lessons

Pick a topic, read the steps, then try them with the presets below (or build your own).

Class 12 — NAND and NOR are universal gates

Concept: NAND and NOR are each powerful enough, on their own, to build every other basic gate — including AND, OR and NOT themselves.

Load the NAND from AND+NOT preset from the Medium row below.
Press Check answer and read the explanation for both gates — Gate 1 is a plain AND, Gate 2 is a NOT of that AND, and the final output is exactly what a single NAND gate on the same inputs would give.
Do the same with the NOR from OR+NOT preset.

Takeaway: NAND = NOT(AND) and NOR = NOT(OR) by definition — building them from two smaller gates isn't a trick, it's literally what the truth tables already say.

Class 12 — The half adder

Concept: the simplest binary-addition circuit, a half adder, computes SUM = A ⊕ B (XOR) and CARRY = A · B (AND) from two single-bit inputs.

Load the Half adder (SUM) preset from the Hard row below.
Press Check answer and follow the five-gate derivation: two NOTs, two ANDs, and a final OR that together reconstruct A ⊕ B.
Toggle input A or B and press Check answer again — confirm the final output always matches what a single XOR gate on A and B would give.

Takeaway: a "SUM" bit in binary addition is just an XOR in disguise — that's the whole idea behind every binary adder circuit inside a real processor.

Class 12 — De Morgan's theorem, wired up

Concept: De Morgan's theorem says NAND(A,B) = OR(NOT A, NOT B) — an AND gate's complement equals the OR of the individually complemented inputs.

Build a NOT gate on input A, and a separate NOT gate on input B.
Add an OR gate wired to those two NOT outputs.
Toggle A and B through all four combinations, pressing Check answer each time, and compare the OR gate's output against what a single NAND(A,B) gate would give on the same inputs — they should always match.

Takeaway: De Morgan's theorem isn't just algebra — it's a real, wireable equivalence between two completely different-looking circuits.

Easy

Medium

Hard

AND

NOT

NAND

NOR

XOR

XNOR

Drag any gate in the diagram above to place it exactly where you want. Tap a gate type below to arm it, then press + Add gate (up to 10) — it appears wired to the earliest available inputs; change what feeds each pin using the small dropdown right next to it in the diagram (or the same controls listed again on the right). Removal only ever happens from the end (last gate or last input) — an earlier gate's output can't be pulled out from under a later gate that depends on it.

Explanation

Press Check answer to see the signal flow explained step by step.

Gate	Type	Input 1	Input 2	Output

Seven gates, one exact rule each

No assumptions — every gate here follows its textbook truth table exactly. Boolean algebra has no idealisations to disclose: AND, OR and NOT are defined operations, and NAND, NOR, XOR and XNOR are just fixed combinations of them. Whatever circuit you build, the output is computed by literally applying those definitions in order — nothing is approximated.

AND outputs 1 only when every input is 1. OR outputs 1 when at least one input is 1. NOT simply flips its single input.

NAND and NOR are AND and OR with an inverted (bubbled) output — and they're called universal gates because either one alone can build every other gate (see the "NAND from AND+NOT" and "NOR from OR+NOT" presets above, then compare their outputs against a direct NAND/NOR — they always agree).

XOR ("exclusive OR") outputs 1 only when its two inputs differ; XNOR is its exact opposite, outputting 1 only when they match. XOR is the building block of a half adder's SUM output — try the "Half adder" preset above.

In real hardware these are built from transistors switching between two voltage bands (TTL/CMOS logic levels) rather than a clean mathematical 0 or 1 — but the whole point of digital logic is that, once a signal is inside a valid HIGH or LOW band, it behaves exactly like the ideal Boolean value. That's why this lab can be 100% exact: there is no "idealisation" being made, digital logic is the exact abstraction.

Part of Forces — see the semiconductor explainer for how a transistor actually realises a logic gate, and Learn for where this fits in the class 12 syllabus.

Truth tables — all seven gates

The exact, complete definition of every gate — this is the whole of what "no assumptions" means here: the lab just applies these tables, in order, to whatever you build.

AND

A	B	Y
0	0	0
0	1	0
1	0	0
1	1	1

OR

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	1

NOT

A	Y
0	1
1	0

NAND

A	B	Y
0	0	1
0	1	1
1	0	1
1	1	0

NOR

A	B	Y
0	0	1
0	1	0
1	0	0
1	1	0

XOR

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	0

XNOR

A	B	Y
0	0	1
0	1	0
1	0	0
1	1	1

JEE & NEET-style practice questions

Ten conceptual questions in the style of what shows up in JEE and NEET-level physics on logic gates — tap a question to reveal the answer.

Which gates are called universal gates, and why?

NAND and NOR are called universal gates because either one, used by itself, can be used to build every other basic gate — AND, OR and NOT. For example, tying both inputs of a NAND gate together turns it into a NOT gate, since NAND(A,A) = NOT(A AND A) = NOT(A). Try the "NAND from AND+NOT" preset above and compare it to a plain NAND gate on the same inputs — they always agree.

What is the output of a NAND gate when both inputs are LOW (0)?

1. A NAND gate outputs 0 only in the single case where both inputs are 1 (HIGH); for every other input combination, including both inputs 0, it outputs 1.

State De Morgan's first theorem and its logic-gate equivalent.

De Morgan's first theorem: (A·B)′ = A′ + B′ — the complement of an AND is the OR of the complements. In gates, this means a NAND gate (AND then NOT) is logically identical to an OR gate fed by two inverted inputs: NAND(A,B) = OR(NOT A, NOT B).

How do you realize the OR operation using only NAND gates?

Use three NAND gates: feed A into a NAND gate with both its inputs tied to A (this gives NOT A), do the same for B to get NOT B, then feed NOT A and NOT B into a third NAND gate. By De Morgan's theorem, NAND(NOT A, NOT B) = A OR B.

Why is XOR sometimes called an "inequality detector"?

Because its output is 1 only when its two inputs are different (one 0 and one 1) and 0 whenever they match. This makes it useful for comparing two bits, for parity checking, and as the SUM output of a half adder.

In a half adder, what are the Boolean expressions for SUM and CARRY?

SUM = A XOR B, and CARRY = A AND B. The half adder is the simplest binary adding circuit and a classic example of combining basic gates into a useful building block — try the "Half adder (SUM)" preset above.

What is another name for a NOT gate, and how can it be built from a NAND gate?

A NOT gate is also called an inverter. It can be built from a NAND gate by tying both of the NAND gate's inputs to the same signal: NAND(A,A) = NOT(A AND A) = NOT(A).

What is the truth-table output sequence of a 2-input XNOR gate for (0,0), (0,1), (1,0), (1,1)?

1, 0, 0, 1. XNOR outputs 1 exactly when its two inputs match (both 0 or both 1), and 0 when they differ.

If a NOR gate has both inputs HIGH, what is the output, and why?

0. NOR is the complement of OR, and OR(1,1) = 1, so NOR(1,1) = NOT(1) = 0. A NOR gate only outputs 1 when both of its inputs are 0.

Two NOT gates are connected in series with input A. What is the final output?

A itself. NOT(NOT(A)) = A — inverting a signal twice always returns the original signal, a property called double negation. Try the "Double NOT" preset above.

Test yourself

Pick Class 12 in the physics quiz to test yourself on logic gates and digital electronics — 10 random questions, with an explanation for every answer.

Take the physics quiz →